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843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 1 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information g eneral d escription the ics843101-312 is a low phase-noise frequency margining synthesizer with fre- quency margining capability and is a member of the hiperclocks? family of high performance clock solutions from ics. in the default mode, the device nominally generates a 312.5mhz lvpecl output clock signal from a 25mhz crystal input. there is also a frequency margining mode available where the device can be programmed, using the serial interface, to vary the output frequency up or down from nominal in 2% steps. the ics843101-312 is provided in a 16-pin tssop. f eatures ? one 312.5mhz nominal lvpecl output ? selectable crystal oscillator interface designed for 25mhz, 18pf parallel resonant crystal or lvcmos single-ended input ? output frequency can be varied in 2% steps from nominal ? vco range: 560mhz - 690mhz ? rms phase jitter @ 312.5mhz, using a 25mhz crystal (1.875mhz-20mhz): <1ps (typical) design target ? output supply modes core/output 3.3v/3.3v 3.3v/2.5v 2.5v/2.5v ? 0c to 70c ambient operating temperature ? available in both standard and lead-free rohs-complaint packages hiperclocks? ic s p in a ssignment the advance information presented herein represents a product currently in design or being considered for design. the noted cha racteristics are design targets. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specifications wit hout notice. v ee s_load s_data s_clock sel oe v cca v cc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 mode v cco q nq v ee clk xtal_out xtal_in ics843101-312 16-lead tssop 4.4mm x 5.0mm x 0.92mm package body g package top view b lock d iagram 11 0 phase detector vco 560 - 690mhz m osc n p serial control q nq pullup pulldown pulldown pulldown pulldown pulldown oe clk sel s_clock s_data s_load mode xtal_in xtal_out pulldown 25mhz
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 2 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information f unctional d escription the ics843101-312 features a fully integrated pll and therefore requires no external components for setting the loop bandwidth. a 25mhz fundamental crystal is used as the input to the on chip oscillator. the output of the osc- illator is fed into the pre-divider. in frequency margining mode, the 25mhz crystal frequency is divided by 2 and a 12.5mhz reference frequency is applied to the phase detector. the vco of the pll operates over a range of 560mhz to 690mhz. the output of the m divider is also applied to the phase detector. the default mode for the ics843101-312 is 312.5mhz output frequency using a 25mhz crystal. the output fre- quency can be changed by placing the device into the margining mode using the mode pin and using the serial interface to program the m feedback divider. frequency margining mode operation occurs when the mode input is high. the phase detector and the m divider force the vco output frequency to be m times the reference fre- quency by adjusting the vco control voltage. note that for some values of m (either too high or too low), the pll will not achieve lock. the output of the vco is scaled by an output divider prior to being sent to the lvpecl output buffer. the divider provides a 50% output duty cycle. the relationship between the crystal input frequency, the m divider, the vco frequency and the output frequency is provided in table 1. when changing back from fre- quency margining mode to nominal mode, the device will return to the default nominal configuration that will provide 312.5 mhz output frequency. serial operation occurs when s_load is high. serial data can be loaded in either the default mode or the fre- quency margining mode. the 6-bit shift register is loaded by sampling the s_data bits with the rising edge of s_clock. after shifting in the 6-bit m divider value, s_load is transitioned from high to low which latches the contents of the shift-register into the m divider control register. when s_load is low, any transitions of s_clock or s_data are ignored. t able 1. f requency m argin f unction t able f igure 1. s erial l oad o perations time s erial l oading t s t h m5 m4 m3 m2 m1 m0 t s s_clock s_data s_load l a t x ) z h m ( r e d i v i d - e r p ) p ( e c n e r e f e r ) z h m ( y c n e u q e r f k c a b d e e f ) m ( r e d i v i d a t a d - m ) y r a n i b ( o c v ) z h m ( t u p t u o ) n ( r e d i v i d t u p t u o ) z h m ( y c n e u q e r f % e g n a h c 5 22 5 . 2 15 41 0 1 1 0 15 . 2 6 52 5 2 . 1 8 20 . 0 1 - 5 22 5 . 2 16 40 1 1 1 0 15 7 52 5 . 7 8 20 . 8 - 5 22 5 . 2 17 41 1 1 1 0 15 . 7 8 52 5 7 . 3 9 20 . 6 - 5 22 5 . 2 18 40 0 0 0 1 10 0 62 0 0 30 . 4 - 5 22 5 . 2 19 41 0 0 0 1 15 . 2 1 62 5 2 . 6 0 30 . 2 - 5 22 5 . 2 10 50 1 0 0 1 15 2 62 5 . 2 1 30 5 22 5 . 2 11 51 1 0 0 1 15 . 7 3 62 5 7 . 8 1 30 . 2 5 22 5 . 2 12 50 0 1 0 1 10 5 62 5 2 30 . 4 5 22 5 . 2 13 51 0 1 0 1 15 . 2 6 62 5 2 . 1 3 30 . 6 5 22 5 . 2 14 50 1 1 0 1 15 7 62 5 . 7 3 30 . 8 5 22 5 . 2 15 51 1 1 0 1 15 . 7 8 62 5 7 . 3 4 30 . 0 1
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 3 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t able 2. p in d escriptions t able 3. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r p u l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r e b m u ne m a ne p y tn o i t p i r c s e d 2 1 , 1v e e r e w o p. s n i p y l p p u s e v i t a g e n 2d a o l _ st u p n in w o d l l u p . s l e v e l e c a f r e t n i l t t v l / s o m c v l . t u p n i l a i r e s e h t f o n o i t a r e p o e h t s l o r t n o c 3a t a d _ st u p n in w o d l l u p . k c o l c _ s f o e g d e g n i s i r e h t n o d e l p m a s a t a d . t u p n i l a i r e s r e t s i g e r t f i h s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 4k c o l c _ st u p n in w o d l l u p e h t n o r e t s i g e r t f i h s e h t o t n i t u p n i a t a d _ s t a t n e s e r p a t a d l a i r e s n i k c o l c . s l e v e l e c a f r e t n i l t t v l / s o m c v l . k c o l c _ s f o e g d e g n i s i r 5l e st u p n in w o d l l u p . t u p n i k l c s t c e l e s , h g i h n e h w . n i p t c e l e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l . s t u p n i l a t x s t c e l e s , w o l n e h w 6e ot u p n ip u l l u p . s t u p t u o q n / q f o g n i l b a s i d d n a g n i l b a n e s l o r t n o c . n i p e l b a n e t u p t u o s l e v e l e c a f r e t n i l t t v l / s o m c v l 7v a c c r e w o p. n i p y l p p u s g o l a n a 8v c c r e w o p. n i p y l p p u s e r o c 0 1 , 9 , n i _ l a t x t u o _ l a t x t u p n i e h t s i n i _ l a t x , t u p t u o e h t s i t u o _ l a t x . e c a f r e t n i l a t s y r c t n a n o s e r l e l l a r a p . t u p n i 1 1k l ct u p n in w o d l l u p. t u p n i k c o l c l t t v l / s o m c v l 4 1 , 3 1q , q nt u p u o. s l e v e l e c a f r e t n i l c e p v l . r i a p t u p t u o l a i t n e r e f f i d 5 1v o c c r e w o p. n i p y l p p u s t u p t u o 6 1e d o mt u p n in w o d l l u p . e d o m g n i n i g r a m y c n e u q e r f = h g i h . e d o m t l u a f e d = w o l . n i p e d o m . s l e v e l e c a f r e t n i l t t v l / s o m c v l : e t o n n w o d l l u p d n a p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 4 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t able 4d. s erial m ode f unction t able t able 4a. oe c ontrol i nput f unction t able t able 4b. sel c ontrol i nput f unction t able t u p n i l e se c r u o s d e t c e l e s 0t u o _ l a t x , n i _ l a t x 1k l c t able 4c. m ode c ontrol i nput f unction t able t u p n is t u p t u o e oq n , q 0z i h 1d e l b a n e t u p n in o i t i d n o c e d o mq n , q 0e d o m t l u a f e d 1e d o m g n i n i g r a m y c n e u q e r f s t u p n i s n o i t i d n o c d a o l _ sk c o l c _ sa t a d _ s lx x . d e r o n g i e r a s t u p n i l a i r e s h a t a d . e d o m t u p n i l a i r e s . k c o l c _ s f o e g d e g n i s i r h c a e n o a t a d _ s n o a t a d h t i w d e d a o l s i r e t s i g e r t f i h s lx . d e h c t a l e r a r e t s i g e r t f i h s e h t f o s t n e t n o c w o l = l : e t o n h g i h = h e r a c t ' n o d = x n o i t i s n a r t e g d e g n i s i r = n o i t i s n a r t e g d e g n i l l a f =
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 5 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t able 5a. p ower s upply dc c haracteristics , v cc = v cca = v cco = 3.3v5%, t a = 0c to 70c a bsolute m aximum r atings supply voltage, v cc 4.6v inputs, v i -0.5v to v cc + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja 89c/w (0 lfpm) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a c c e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v v o c c e g a t l o v y l p p u s t u p t u o 5 3 1 . 33 . 35 6 4 . 3v i e e t n e r r u c y l p p u s r e w o p d b ta m i c c t n e r r u c y l p p u s e r o c d b ta m i a c c t n e r r u c y l p p u s g o l a n a d b ta m i o c c t n e r r u c y l p p u s t u p t u o d b ta m t able 5b. p ower s upply dc c haracteristics , v cc = v cca = 3.3v5%,v cco = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a c c e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v v o c c e g a t l o v y l p p u s t u p t u o 5 7 3 . 25 . 25 2 6 . 2v i e e t n e r r u c y l p p u s r e w o p d b ta m i c c t n e r r u c y l p p u s e r o c d b ta m i a c c t n e r r u c y l p p u s g o l a n a d b ta m i o c c t n e r r u c y l p p u s t u p t u o d b ta m t able 5c. p ower s upply dc c haracteristics , v cc = v cca = v cco = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a c c e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v v o c c e g a t l o v y l p p u s t u p t u o 5 7 3 . 25 . 25 2 6 . 2v i e e t n e r r u c y l p p u s r e w o p d b ta m i c c t n e r r u c y l p p u s e r o c d b ta m i a c c t n e r r u c y l p p u s g o l a n a d b ta m i o c c t n e r r u c y l p p u s t u p t u o d b ta m
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 6 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t able 6. c rystal c haracteristics t able 5d. lvcmos / lvttl dc c haracteristics , t a = 0c to 70c t able 5e. lvpecl dc c haracteristics , t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u ov o c c 4 . 1 -v o c c 9 . 0 -v v l o 1 e t o n ; e g a t l o v w o l t u p t u ov o c c 0 . 2 -v o c c 7 . 1 -v v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p 6 . 00 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t o c c . v 2 - r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 5 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 0 0 1w . l a t s y r c t n a n o s e r l e l l a r a p f p 8 1 n a g n i s u d e z i r e t c a r a h c : e t o n t able 7. i nput f requency c haracteristics , t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f n i t u p n i y c n e u q e r f k l c 5 2z h m t u o _ l a t x / n i _ l a t x 5 2z h m k c o l c _ s 0 5z h m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i v c c v 3 . 3 =2v c c 3 . 0 +v v c c v 5 . 2 =7 . 1v c c 3 . 0 +v v l i e g a t l o v w o l t u p n i v c c v 3 . 3 =3 . 0 -8 . 0v v c c v 5 . 2 =3 . 0 -7 . 1v i h i t u p n i t n e r r u c h g i h , l e s , k l c , d a o l _ s , a t a d _ s e d o m , k c o l c _ s v c c v = n i 5 6 4 . 3 = v 5 2 6 . 2 r o 0 5 1a e o v c c v = n i 5 6 4 . 3 = v 5 2 6 . 2 r o 5a i l i t u p n i t n e r r u c w o l , l e s , k l c , d a o l _ s , a t a d _ s e d o m , k c o l c _ s v c c , v 5 2 6 . 2 r o v 5 6 4 . 3 = v n i v 0 = 5 -a e o v c c , v 5 2 6 . 2 r o v 5 6 4 . 3 = v n i v 0 = 0 5 1 -a / t v n o i t s i s n a r t t u p n i e t a r l l a f / e s i r , l e s , e o , a t a d _ s , k c o l c _ s e d o m , d a o l _ s 0 2v / s n
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 7 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t able 8a. ac c haracteristics , v cc = v cca = v cco = 3.3v5%, t a = 0c to 70c t able 8b. ac c haracteristics , v cc = v cca = 3.3v5%,v cco = 2.5v5%, t a = 0c to 70c t able 8c. ac c haracteristics , v cc = v cca = 3.3v5%,v cco = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 . 2 1 3z h m t ) ? ( t i j1 e t o n ; r e t t i j e s a h p s m r w o l = e d o m ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 . 2 1 3 d b ts p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 2d b ts p c d oe l c y c y t u d t u p t u o 0 5% t s e m i t p u t e s o t a t a d _ s k c o l c _ s 0 1s n k c o l c _ s d a o l _ s o t 0 1s n t h e m i t d l o h o t a t a d _ s k c o l c _ s 0 1s n . l a t s y r c z h m 5 2 a g n i s u d e z i r e t c a r a h c : 1 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 . 2 1 3z h m t ) ? ( t i j1 e t o n ; r e t t i j e s a h p s m r w o l = e d o m ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 . 2 1 3 d b ts p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 2d b ts p c d oe l c y c y t u d t u p t u o 0 5% t s e m i t p u t e s o t a t a d _ s k c o l c _ s 0 1s n k c o l c _ s d a o l _ s o t 0 1s n t h e m i t d l o h o t a t a d _ s k c o l c _ s 0 1s n . l a t s y r c z h m 5 2 a g n i s u d e z i r e t c a r a h c : 1 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 . 2 1 3z h m t ) ? ( t i j1 e t o n ; r e t t i j e s a h p s m r w o l = e d o m ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 . 2 1 3 d b ts p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 2d b ts p c d oe l c y c y t u d t u p t u o 0 5% t s e m i t p u t e s o t a t a d _ s k c o l c _ s 0 1s n k c o l c _ s d a o l _ s o t 0 1s n t h e m i t d l o h o t a t a d _ s k c o l c _ s 0 1s n . l a t s y r c z h m 5 2 a g n i s u d e z i r e t c a r a h c : 1 e t o n
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 8 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information p arameter m easurement i nformation t pw t period t pw t period odc = x 100% q 2.5v c ore /2.5v o utput l oad ac t est c ircuit 3.3v c ore /2.5v o utput l oad ac t est c ircuit 3.3v c ore /3.3v o utput l oad ac t est c ircuit scope qx nqx lvpecl 2v -1.3v 0.165v rms p hase j itter clock outputs 20% 80% 80% 20% t r t f v sw i n g v cc , v cca , v cco v ee nq o utput d uty c ycle /p ulse w idth /p eriod phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power o utput r ise /f all t ime scope qx nqx lvpecl 2.8v0.04v -0.5v 0.125v v cc , v cca v ee v cco 2v scope qx nqx lvpecl 2v -0.5v 0.125v v cc , v cca , v cco v ee
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 9 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information a pplication i nformation c rystal i nput i nterface the ics843101-312 has been characterized with 18pf parallel resonant crystals. the capacitor values shown in figure 3 below were determined using a 25mhz, 18pf par- figure 3. c rystal i npu t i nterface allel resonant crystal and were chosen to minimize the ppm error. as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics843101-312 pro- vides separate power supplies to isolate any high switch- ing noise from the outputs to the internal pll. v cc , v cca , and v cco should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 2 illustrates how a 10 resistor along with a 10f and a .01 f bypass capacitor should be connected to each v cca . the 10 resis- tor can also be replaced by a ferrite bead. p ower s upply f iltering t echniques f igure 2. p ower s upply f iltering 10 v cca 10 f .01 f 3.3v or 2.5v .01 f v cc c1 27p x1 18pf parallel crystal c2 27p xtal_out xtal_in
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 10 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t ermination for 3.3v lvpecl o utput v cc - 2v 50 50 rtt z o = 50 z o = 50 fout fin rtt = z o 1 ((v oh + v ol ) / (v cc ? 2)) ? 2 3.3v 125 125 84 84 z o = 50 z o = 50 fout fin the clock layout topology shown below is a typical ter- mination for lvpecl outputs. the two different layouts mentioned are recommended only as guidelines. fout and nfout are low impedance follower outputs that generate ecl/lvpecl compatible outputs. there- fore, terminating resistors (dc current path to ground) or current sources must be used for functionality. these f igure 4b. lvpecl o utput t ermination f igure 4a. lvpecl o utput t ermination outputs are designed to drive 50 transmission lines. matched impedance techniques should be used to maxi- mize operating frequency and minimize signal distor- tion. figures 4a and 4b show two different layouts which are recommended only as guidelines. other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compat- ibility across all printed circuit and clock component pro- cess variations. i nputs : c rystal i nput : for applications not requiring the use of the crystal oscillator input, both xtal_in and xtal_out can be left floating. though not required, but for additional protection, a 1k resistor can be tied from xtal_in to ground. clk i nput : for applications not requiring the use of the test clock, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the clk input to ground. r ecommendations for u nused i nput p ins lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used.
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 11 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t ermination for 2.5v lvpecl o utput figure 5a and figure 5b show examples of termination for 2.5v lvpecl driver. these terminations are equivalent to terminating 50 to v cc - 2v. for v cc = 2.5v, the v cc - 2v is very close to ground level. the r3 in figure 4b can be eliminated and the termination is shown in figure 4c. f igure 5c. 2.5v lvpecl t ermination e xample f igure 5b. 2.5v lvpecl d river t ermination e xample f igure 5a. 2.5v lvpecl d river t ermination e xample r2 62.5 zo = 50 ohm r1 250 + - 2.5v 2,5v lvpecl driv er r4 62.5 r3 250 zo = 50 ohm 2.5v vcc=2.5v r1 50 r3 18 zo = 50 ohm zo = 50 ohm + - 2,5v lvpecl driv er vcc=2.5v 2.5v r2 50 2,5v lvpecl driv er vcc=2.5v r1 50 r2 50 2.5v zo = 50 ohm zo = 50 ohm + -
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 12 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information r eliability i nformation t ransistor c ount the transistor count for ics843101-312 is: tbd t able 9. ja vs . a ir f low t able for 16 l ead tssop ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard t est boards 137.1c/w 118.2c/w 106.8c/w multi-layer pcb, jedec standard test boards 89.0c/w 81.8c/w 78.1c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs.
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 13 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information p ackage o utline - g s uffix for 16 l ead tssop t able 10. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n6 1 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 9 . 40 1 . 5 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
843101ag-312 www.icst.com/products/hiperclocks.html october 18, 2005 14 integrated circuit systems, inc. ics843101-312 f emto c locks ? c rystal - to -lvpecl 312.5mh z f requency m argining s ynthesizer advance information t able 11. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademarks, hiperclocks and femtoclocks are trademarks of integrated circuit systems, inc. or its subsidiari es in the united states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t 2 1 3 - g a 1 0 1 3 4 8 s c i0 0 1 a 1 0 1 3p o s s t d a e l 6 1e b u tc 5 8 o t c 0 4 - t 2 1 3 - g a 1 0 1 3 4 8 s c i0 0 1 a 1 0 1 3p o s s t d a e l 6 1l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - f l 2 1 3 - g a 1 0 1 3 4 8 s c id b tp o s s t " e e r f - d a e l " d a e l 6 1e b u tc 5 8 o t c 0 4 - t f l 2 1 3 - g a 1 0 1 3 4 8 s c id b tp o s s t " e e r f - d a e l " d a e l 6 1l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - . t n i a l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n

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